This invention relates to GaAs Metal Insulator Semiconductor (MIS) integrated circuits, or Insulated Gate Field-Effect Transistor (IGFET) devices, and more particularly, to such devices of the buried channel type.
The following references show the state of the art:
1. L. Messick, "Power gain and noise of InP and GaAs insulated gate microwave FETs," Solid-State Electronics 22, pp 71-76, 1979.
2. R. L. VanTuyl, C. A. Liechti, R. E. Lee, and E. Gowen, "GaAs MESFET logic with 4 GHz clock rate" IEEE J. Solid State Circuits, Vol SC-12, pp 485-496, October 1977.
3. R. C. Eden, B. M. Welch, and R. Zucca, "Low power GaAs Digital ICs using Schottky diode-FET logic," 1978 Solid State Circuits Digest Tech Papers, February 1978, pp 68-69.
4. P. T. Greiling, C. F. Krumm, F. S. Ozdemir, L. H. Hackett, and R. F. Lohr Jr., "Electron beam fabricated GaAs FET inverter," IEEE Trans. Electron Devices, Vol ED-25, p 1340, November 1978.
5. R. E. Lundgren, C. G. Krumm, and R. L. Pierson, "Fast enhancement-mode GaAs MESFET logic," IEEE Trans. Electron Devices ED-26, p 1827, November 1979.
6. R. Zuleeg, J. K. Notthoff, and K. Lehovec, "Femtojoule high-speed planar GaAs E-JFET logic," IEEE Trans. Electron Devices, Vol ED-25, pp 628-639, June 1978.
7. W. E. Spicer, P. W. Chye, P. R. Skeath, C. Y. Su, and I. Lindau, "New and unified model for Schottky barrier and III-V insulator interface states formation," J. Vac. Sci. Techn. 16(5) pp 1422-1433, September/October 1979.
8. T. Mimura, N. Yokoyama, H. Kusakawa, K. Suvama, and M. Fukuta, "GaAs MOSFET for low power high-speed logic applications," IEEE Trans, Electron Devices, Vol ED-26, 1828, November 1979 and N. Yokoyama, T. Mimura, K. Suyama, H. Kusakawa, and M. Fukuta," GaAs MOSFET high-speed logic," 3rd International Conference on Solid State Devices, 1979, Tokyo, Japan.
9. R. L. VanTuyl and C. A. Liechti, "High speed GaAs MSI," 1976 ISSCC, Digest of Technical Papers, pp 20-21, February 1976.
10. J. Tihanyi and V. Hoepfner, U.S. Pat. No. 4,101,922 for a Field Effect Transistor with a Short Channel Length.
11. D. H. Lee, U.S. Pat. No. 4,156,879 for a Passivated V-Gate GaAs Field-Effect Transistor.
12. S. Akai and Y. Niskida, U.S. Pat. No. 4,158,851 for a Semi-Insulating Gallium Arsenide Single Crystal.
13. J. Tihanyi and G. Bell, U.S. Pat. No. 4,190,850 for a MIS Field Effect Transistor Having a Short Channel Length.
In the past, metal insulator semiconductor (MIS) GaAs devices have been studied, for example, by Messick et al. (1), in the hope of obtaining enhancement mode transistors which could be used in integrated circuits. At present, most digital GaAs circuits utilize depletion mode transistors which are cumbersome to use, require a relatively large area, and consume a large amount of power due to the required level shift circuit. For example, see VanTuyl et al. (2), Eden et al. (3) and Greiling et al. (4). Work is also performed on enhancement mode devices. For example, see Lundgren et al. (5) and Suleeg et al. (6). In these devices, carrier density in the active layer and its thickness is minimized to obtain enhancement mode characteristics. While the gates using enhancement mode devices indeed require less area and consume less power than gates with depletion mode devices, the current drive capability of the enhancement mode devices is reduced, resulting in slower gates.
Most work on MIS GaAs devices, for example, by Messick et al. (1), and by Spicer et al. (7), show large surface state densities which render these devices unstable, e.g., these transistors show hysteresis effects. In fact, no dc field effect transistor (FET) characteristics could be observed in GaAs IGFETS, where native oxides and SiON were used as insulators. Recently, T. Mimura et al. (8) was able to demonstrate ring oscillators using GaAs IGFETS, where the insulator was formed by plasma anodization. However, no work has been reported on using these devices in latches. Due to the hysteresis effects, latches are more difficult to realize than ring oscillators and yet latches are vital elements in today's integrated circuits, e.g., for prescaler applications.